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  1 for more information www.linear.com/LTC3371 typical application features description 4-channel 8a configurable buck dc/dcs with watchdog and power-on reset the lt c ? 3371 is a highly flexible multioutput power supply ic. the device includes four synchronous buck convert- ers, configured to share eight 1 a power stages, each of which is powered from independent 2.25 v to 5.5 v inputs. the dc/dcs are assigned to one of eight possible power configurations via pin programmable c1-c3 pins. the common buck switching frequency may be programmed with an external resistor, synchronized to an external oscil - lator, or set to a default internal 2 mhz clock. the operating mode for all dc/dcs may be programmed for burst mode or forced continuous mode operation. the ct pin programs the timing parameters of four inde - pendent rst pins as well as the watchdog timer. to reduce input noise, the buck converters are phased in 90 steps. precision enable pin thresholds facilitate reli - able power sequencing. the LTC3371 is available in low profile 38-lead 5mm 7mm qfn and tssop packages. applications n 8 1 a buck power stages configurable as 2, 3 or 4 output channels n 8 unique output configurations (1 a to 4 a per channel) n independent v in supplies for each dc/ dc (2.25 v to 5.5 v) n low total no load supply current: n 15 a in shutdown ( all channels off) n 68 a one channel active in burst mode ? operation n 18 a per additional channel n precision enable pin thresholds for autonomous sequencing n 1mhz to 3mhz rt programmable frequency (2mhz default) or pll synchronization n temp monitor indicates die temperature n ct programmed watchdog timer n independent rst pins indicate buck in regulation n thermally enhanced 38-lead 5mm 7mm qfn and tssop packages n general purpose multichannel power supplies: automotive, industrial, distributed power systems l, lt , lt c , lt m , burst mode, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. 2.25v to 5.5v v ina v inb v ine v inf v inc v ind v ing v inh swa swb swe swf 2.25v to 5.5v v out1 = 1.2v/2a v out2 = 1.5v/2a v out3 = 1.8v/2a v out4 = 2.5v/2a 2.7v to 5.5v LTC3371 v cc c1 c2 c3 fb3 en3 rst3 fb1 en1 rst1 2.5v to 5.5v swc swd swg swh 2.25v to 5.5v fb4 en4 rst4 fb2 en2 rst2 temp wdi wdo pll/mode rt ct gnd 3371 ta01 2.2h 2.2h 324k 645k 412k 475k 806k 649k 665k 309k c3 c2 c1 buck1 buck2 buck3 buck4 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 2 a 3a 3a 4a 3a 4a 4a 4a 2 a 1a 1a 1a 2a C C C 2 a 2a 1a 1a C 2a 1a C 2 a 2a 3a 2a 3a 2a 3a 4a buck efficiency vs i load ltc 3371 3371fb 20 30 40 50 60 70 80 90 100 efficiency (%) load current (ma) 3371 ta01b 1a buck 2a buck 3a buck 4a buck v in = 3.3v v out 1 = 1.8v f osc = 1mhz l = 3.3h burst mode operation 10 100 1000 4000 0 10
2 for more information www.linear.com/LTC3371 table of contents features ..................................................... 1 applications ................................................ 1 t ypical application ........................................ 1 description .................................................. 1 absolute maximum ratings .............................. 3 pin configuration .......................................... 3 order information .......................................... 3 electrical characteristics ................................. 4 t ypical performance characteristics ................... 6 pin functions .............................................. 12 block diagram ............................................. 14 operation ................................................... 15 buck switching regulators ..................................... 15 b uck regulators with combined power stages ...... 15 p ower failure reporting via rst pins .................... 16 t emperature monitoring and overtemperature protection ............................................................... 16 p rogramming the operating frequency .................. 16 w indowed watchdog timer .................................... 17 c hoosing the c t capacitor ...................................... 17 applications information ................................ 18 b uck switching regulator output voltage and feedback network .................................................. 18 bu ck regulators ..................................................... 18 c ombined buck power stages ................................ 18 i nput and output decoupling capacitor selection... 18 pcb considerations ................................................ 20 t ypical applications ...................................... 20 package description ..................................... 23 revision history .......................................... 25 t ypical application ....................................... 26 related parts .............................................. 26 ltc 3371 3371fb
3 for more information www.linear.com/LTC3371 pin configuration absolute maximum ratings v ina -h , fb 1-4, en 1-4, v cc , ct , wdi , wdo , rst 1-4 , rt, pll / mode , c 1-3 ................................... C0. 3 v to 6v temp .................. C 0.3 v to lesser of (v cc + 0.3 v) or 6v i rst 1-4 , i wdo ............................................................. 5 ma (note 1) 13 14 15 16 top view 39 gnd uhf package 38-lead (5mm 7mm) plastic qfn 17 18 19 38 37 36 35 34 33 32 24 25 26 27 28 29 30 31 8 7 6 5 4 3 2 1fb1 v ina swa swb v inb v inc swc swd v ind fb2 en2 rst2 en4 fb4 v inh swh swg v ing v inf swf swe v ine fb3 en3 en1 rst1 temp v cc pll/mode rt rst4 c1 c2 c3 wdi wdo ct rst3 23 22 21 20 9 10 11 12 t jmax = 150c, e ja = 34c/w exposed pad ( pin 39) is gnd, must be soldered to pcb 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 top view fe package 38-lead plastic tssop 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 v cc temp rst1 en1 fb1 v ina swa swb v inb v inc swc swd v ind fb2 en2 rst2 c1 c2 c3 pll/mode rt rst4 en4 fb4 v inh swh swg v ing v inf swf swe v ine fb3 en3 rst3 ct wdo wdi 39 gnd t jmax = 150c, e ja = 25c/w exposed pad ( pin 39) is gnd, must be soldered to pcb order information lead free finish tape and reel part marking* package description temperature range LTC3371euhf#pbf LTC3371euhf#trpbf 3371 38-lead (5mm = 7mm) plastic qfn C40c to 125c LTC3371iuhf#pbf LTC3371iuhf#trpbf 3371 38-lead (5mm = 7mm) plastic qfn C40c to 125c LTC3371huhf#pbf LTC3371huhf#trpbf 3371 38-lead (5mm = 7mm) plastic qfn C40c to 150c LTC3371efe#pbf LTC3371efe#trpbf LTC3371fe 38-lead plastic tssop C40c to 125c LTC3371ife#pbf LTC3371ife#trpbf LTC3371fe 38-lead plastic tssop C40c to 125c LTC3371hfe#pbf LTC3371hfe#trpbf LTC3371fe 38-lead plastic tssop C40c to 150c consult lt c marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult lt c marketing for information on nonstandard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. some packages are available in 500 unit reels through designated sales channels with #trmpbf suffix. operating junction temperature range ( notes 2, 3) ............................................ C 40 c to 150 c storage temperature range .................. C 65 c to 150 c http://www .linear.com/product/LTC3371#orderinfo ltc 3371 3371fb
4 for more information www.linear.com/LTC3371 electrical characteristics the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c. (note 2) v cc = v ina-h = 3.3v, unless otherwise specified. symbol parameter conditions min typ max units v cc v cc voltage range l 2.7 5.5 v v cc(uvlo) undervoltage threshold on v cc v cc voltage falling v cc voltage rising l l 2.325 2.425 2.45 2.55 2.575 2.675 v v i vcc(alloff) v cc input supply current all switching regulators in shutdown 15 25 a i vcc v cc input supply current one buck active pll/mode = 0v, r t = 400k, v fb_buck = 0.85v pll/mode = 2mhz 50 175 75 250 a a f osc internal oscillator frequency v rt = v cc , pll/mode = 0v v rt = v cc , pll/mode = 0v r t = 400k, pll/mode = 0v l l 1.8 1.75 1.8 2 2 2 2.2 2.25 2.2 mhz mhz mhz f pll/mode synchronization frequency t low , t high > 60ns l 1 3 mhz v pll/mode pll/mode level high pll/mode level low for synchronization for synchronization l l 1.2 0.4 v v v rt rt servo voltage r t = 400k l 780 800 820 mv temp monitor v temp(room) temp voltage at 25c 180 220 260 mv v temp /c v temp slope 7 mv/c ot overtemperature shutdown 170 c ot hyst overtemperature hysteresis 10 c 1a buck regulators v in buck input voltage range l 2.25 5.5 v v out buck output voltage range l v fb v in v v in(uvlo) undervoltage threshold on v in v in voltage falling v in voltage rising l l 1.95 2.05 2.05 2.15 2.15 2.25 v v i vin burst mode operation input current forced continuous mode operation input current shutdown input current v fb = 0.85v (note 4) i sw(buck) = 0a, fb = 0v 18 400 0 30 600 2.5 a a a i fwd pmos current limit (note 5) 1.9 2.3 2.7 a v fb1 feedback regulation voltage for buck 1 l 792 800 808 mv v fb feedback regulation voltage for bucks 2-4 l 780 800 820 mv i fb feedback leakage current v fb = 0.85v C50 50 na d max maximum duty cycle v fb = 0v l 100 % r pmos pmos on-resistance i sw = 100ma 300 m r nmos nmos on-resistance i sw = C100ma 240 m i leakp pmos leakage current en = 0 C2 2 a i leakn nmos leakage current en = 0 C2 2 a t ss soft-start time 1 ms v pgood(fall) falling pgood threshold for buck 1 % of regulated v fb 96.8 98 99.2 % falling pgood threshold for bucks 2 to 4 % of regulated v fb 93 95 97 % v pgood(hys) pgood hysteresis for bucks 1 to 4 % of regulated v fb 0.3 % ltc 3371 3371fb
5 for more information www.linear.com/LTC3371 electrical characteristics the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c. (note 2) v cc = v ina-h = 3.3v, unless otherwise specified. symbol parameter conditions min typ max units buck regulators combined i fwd 2 pmos current limit 2 buck power stages combined (note 5) 4.6 a i fwd 3 pmos current limit 3 buck power stages combined (note 5) 6.9 a i fwd 4 pmos current limit 4 buck power stages combined (note 5) 9.2 a interface logic pins (rst1-4, wdo, wdi, pll/mode, c1, c2, c3) i oh output high leakage current rst1-4, wdo 5.5v at pin 1 a v ol output low voltage rst1-4, wdo 3ma into pin 0.1 0.4 v v ih wdi input high threshold l 1.2 v v il wdi, c1, c2, c3 input low threshold l 0.4 v t wdi(width) wdi pulse width l 40 ns v ih pll/mode, c1, c2, c3 input high threshold l v cc C 0.4 v v il pll/mode input low threshold l v cc C 1.2 v interface logic pins (en1, en2, en3, en4) v hi(alloff) enable rising threshold all regulators disabled l 730 1200 mv v hi enable rising threshold at least one regulator enabled l 400 420 mv v lo enable falling threshold 340 390 mv i en enable pin leakage current en = 3.3v 1 a ct timing parameters; c t = 10nf t wdi0 time from wdo low until next wdo low c t = 10nf l 10.3 6.2 12.9 12.9 15.5 sec sec t wdi time from last wdi until next wdo low c t = 10nf l 1.30 0.77 1.62 1.62 1.95 sec sec t wdl watchdog lower boundary c t = 10nf l 40 50.6 50.6 60 65 ms ms t wdo wdo low time absent a transition at wdi c t = 10nf 160 202 280 ms t rst rst assertion delay c t = 10nf 160 202 240 ms note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LTC3371 is tested under pulsed load conditions such that t j t a . the LTC3371e is guaranteed to meet specifications from 0c to 85c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the LTC3371i is guaranteed over the C40c to 125c operating junction temperature range. the LTC3371h is guaranteed over the C40c to 150c operating junction temperature range. high junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125c. note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. the junction temperature (t j in c) is calculated from the ambient temperature (t a in c) and power dissipation (p d in watts) according to the formula: t j = t a + (p d ? ja ) where ja (in c/w) is the package thermal impedance. note 3: the LTC3371 includes overtemperature protection which protects the device during momentary overload conditions. junction temperatures will exceed 150c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may impair device reliability. note 4: static current, switches not switching. actual current may be higher due to gate charge losses at the switching frequency. note 5: the current limit features of this part are intended to protect the ic from short term or intermittent fault conditions. continuous operation above the maximum specified pin current rating may result in device degradation over time. ltc 3371 3371fb
6 for more information www.linear.com/LTC3371 typical performance characteristics buck efficiency vs i load buck power loss vs i load t a = 25c unless otherwise noted. load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 1 100 1000 4000 3371 g01 0 10 burst mode operation v in = 3.3v v out = 1.8v f osc = 2mhz l = 2.2h 1a buck 2a buck 3a buck 4a buck load current (ma) 1500 power loss (mw) 3000 1000 500 2500 2000 1 100 1000 4000 3371 g02 0 10 1a buck 2a buck 3a buck 4a buck burst mode operation v in = 3.3v v out = 1.8v f osc = 2mhz l = 2.2h ltc 3371 3371fb 155 pll/mode = 0v fb = 850mv temperature (c) ?55 ?25 5 35 65 95 125 2.30 155 0 40 80 120 160 200 240 280 320 2.35 360 400 i vcc (a) vs temperature v cc supply current 3371 g07 v cc = 2.7v v cc = 3.3v v cc = 5.5v at least one buck enabled 2.40 pll/mode = 2mhz temperature (c) ?55 ?25 5 35 65 95 125 155 2.45 1.80 1.85 1.90 1.95 2.00 2.05 2.10 2.15 2.20 f osc (mhz) 2.50 frequency vs temperature r t programmed oscillator 3371 g08 v cc = 2.7v v cc = 3.3v v cc = 5.5v r t = 400k temperature (c) ?55 ?25 2.55 5 35 65 95 125 155 1.80 1.85 1.90 1.95 2.60 2.00 2.05 2.10 2.15 2.20 f osc (mhz) vs temperature default oscillator frequency 3371 g09 v cc = 2.7v 2.65 v cc = 3.3v v cc = 5.5v v rt = v cc 2.70 temperature (c) uv threshold (v) vs temperature v cc undervoltage threshold 3371 g03 v cc rising v cc falling temperature (c) ?55 ?25 5 ?55 35 65 95 125 155 1.90 1.95 2.00 2.05 2.10 ?25 2.15 2.20 2.25 2.30 uv threshold (v) vs temperature buck v in undervoltage threshold 3371 g04 v in rising v in falling 5 temperature (c) ?55 ?25 5 35 65 95 125 155 0 35 5 10 15 20 25 30 35 40 i vcc_alloff (a) vs temperature 65 v cc supply current 3371 g05 v cc = 2.7v v cc = 3.3v v cc = 5.5v all regulators in shutdown temperature (c) ?55 ?25 95 5 35 65 95 125 155 0 25 50 75 125 100 125 i vcc (a) vs temperature v cc supply current 3371 g06 v cc = 2.7v v cc = 3.3v v cc = 5.5v at least one buck enabled
7 for more information www.linear.com/LTC3371 typical performance characteristics oscillator frequency vs v cc oscillator frequency vs r t t a = 25c unless otherwise noted. 2.7 f osc (mhz) 2.2 2.1 2 1.9 2.15 2.05 1.95 1.85 1.8 4.3 3.5 5.1 v cc (v) 3371 g10 5.5 3.9 3.1 4.7 v rt = v cc r t = 400k r t (k) 250 f osc (mhz) 4 3 2 1 3.5 2.5 1.5 0.5 0 450 650 350 550 750 3371 g11 800 400 600 300 500 700 v cc = 3.3v ltc 3371 3371fb 155 v in = 2.25v v in = 3.3v v in = 5.5v burst mode operation fb = 850mv temperature (c) ?55 ?25 5 35 ?200 65 95 125 155 0 50 100 150 200 250 0 300 350 400 450 500 550 i vin_forced_continuous (a) vs temperature 200 buck v in supply current 3371 g16 v in = 2.25v v in = 3.3v 400 v in = 5.5v forced continuous mode fb = 0v temperature (c) ?55 ?25 5 35 600 65 95 125 155 1.72 1.74 1.76 1.78 1.80 1.82 800 1.84 1.86 1.88 v out (v) v out vs temperature 3371 g17 v in = 2.25v v in = 3.3v v in = 5.5v i 1000 load = 0ma forced continuous mode temperature (c) ?55 ?25 5 35 65 95 1200 125 155 2.0 2.1 2.2 2.3 2.4 2.5 2.6 i fwd (a) 1400 vs temperature pmos current limit 3371 g18 v in = 3.3v temperature (c) v temp (mv) v temp vs temperature 3371 g12 i load = 0ma actual v temp ideal v temp v cc = 3.3v temperature (c) ?55 ?25 ?55 5 35 65 95 125 155 350 400 450 500 ?25 550 600 650 700 750 800 850 900 en threshold (mv) enable threshold vs temperature 5 3371 g13 en rising en falling all regulators disabled v cc = 3.3v temperature (c) ?55 ?25 35 5 35 65 95 125 155 375 380 385 390 65 395 400 405 410 415 en threshold (mv) vs temperature enable pin precision threshold 3371 g14 en rising 95 en falling temperature (c) ?55 ?25 5 35 65 95 125 155 125 0 10 20 30 40 50 i vin_burst (a) vs temperature buck v in supply current 3371 g15
8 for more information www.linear.com/LTC3371 typical performance characteristics 1a buck power loss vs i load , v out ?=?1.2v 1a buck efficiency vs i load , v out ?=?1.8v 1a buck power loss vs i load , v out ?=?1.8v 1a buck efficiency vs i load , v out ?=?2.5v 1a buck power loss vs i load , v out ?=?2.5v 1a buck efficiency vs i load , v out ?=?3.3v 1a buck efficiency vs i load , v out ?=?1.2v t a = 25c unless otherwise noted. load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 3371 g21 0 1 100 1000 10 v out = 1.2v f osc = 2mhz l = 2.2h forced continuous mode burst mode v in = 2.25v v in = 3.3v v in = 5.5v v in = 2.25v v in = 3.3v v in = 5.5v load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 3371 g23 0 1 100 1000 10 v out = 1.8v f osc = 2mhz l = 2.2h v in = 2.25v v in = 3.3v v in = 5.5v v in = 2.25v v in = 3.3v v in = 5.5v forced continuous mode burst mode load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 3371 g25 0 1 100 1000 10 forced continuous mode burst mode v out = 2.5v f osc = 2mhz l = 2.2h v in = 2.7v v in = 3.3v v in = 5.5v v in = 2.7v v in = 3.3v v in = 5.5v load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 3371 g27 0 1 100 1000 10 forced continuous mode burst mode v out = 3.3v f osc = 2mhz l = 2.2h v in = 4.2v v in = 5.5v v in = 4.2v v in = 5.5v load current (ma) 300 power loss (mw) 900 1000 200 100 800 500 700 600 400 3371 g22 0 1 100 1000 10 burst mode v out = 1.2v f osc = 2mhz l = 2.2h v in = 2.25v v in = 3.3v v in = 5.5v load current (ma) 300 power loss (mw) 900 1000 200 100 800 500 700 600 400 3371 g24 0 1 100 1000 10 burst mode v out = 1.8v f osc = 2mhz l = 2.2h v in = 2.25v v in = 3.3v v in = 5.5v load current (ma) 300 power loss (mw) 900 1000 200 100 800 500 700 600 400 3371 g26 0 1 100 1000 10 burst mode v out = 2.5v f osc = 2mhz l = 2.2h v in = 2.7v v in = 3.3v v in = 5.5v ltc 3371 3371fb temperature (c) ?55 ?25 5 35 65 95 125 155 150 200 250 300 350 400 450 500 550 r ds(on) (m) pmos r ds(on) vs temperature 3371 g19 v in = 2.25v v in = 3.3v v in = 5.5v temperature (c) ?55 ?25 5 35 65 95 125 155 150 200 250 300 350 400 450 r ds(on) (m) nmos r ds(on) vs temperature 3371 g20 v in = 2.25v v in = 3.3v v in = 5.5v
9 for more information www.linear.com/LTC3371 typical performance characteristics 3a buck efficiency vs i load , v out ?=?1.8v 3a buck efficiency vs i load , v out ?=?2.5v 4a buck efficiency vs i load , v out ?=?1.8v 4a buck efficiency vs i load , v out ?=?2.5v 1a buck efficiency vs i load (across operating frequency) 1a buck efficiency vs frequency (forced continuous mode) 2a buck efficiency vs i load , v out ?=?2.5v t a = 25c unless otherwise noted. 1a buck power loss vs i load , v out ?=?3.3v 2a buck efficiency vs i load , v out ?=?1.8v load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 3371 g29 0 1 100 1000 10 v out = 1.8v f osc = 2mhz l = 2.2h v in = 2.25v v in = 3.3v v in = 5.5v v in = 2.25v v in = 3.3v v in = 5.5v burst mode forced continuous mode load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 3371 g30 0 1 100 1000 10 v out = 2.5v f osc = 2mhz l = 2.2h v in = 2.7v v in = 3.3v v in = 5.5v v in = 2.7v v in = 3.3v v in = 5.5v burst mode forced continuous mode load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 3371 g31 0 1 100 1000 10 v out = 1.8v f osc = 2mhz l = 2.2h v in = 2.25v v in = 3.3v v in = 5.5v v in = 2.25v v in = 3.3v v in = 5.5v burst mode forced continuous mode load current (ma) 300 power loss (mw) 900 1000 200 100 800 500 700 600 400 3371 g28 0 1 100 1000 10 burst mode v out = 3.3v f osc = 2mhz l = 2.2h v in = 4.2v v in = 5.5v load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 3371 g32 0 1 100 1000 10 v out = 2.5v f osc = 2mhz l = 2.2h v in = 2.7v v in = 3.3v v in = 5.5v v in = 2.7v v in = 3.3v v in = 5.5v burst mode forced continuous mode load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 3371 g33 0 1 100 1000 10 v out = 1.8v f osc = 2mhz l = 2.2h v in = 2.25v v in = 3.3v v in = 5.5v v in = 2.25v v in = 3.3v v in = 5.5v burst mode forced continuous mode load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 3371 g34 0 1 100 1000 10 v out = 2.5v f osc = 2mhz l = 2.2h v in = 2.7v v in = 3.3v v in = 5.5v v in = 2.7v v in = 3.3v v in = 5.5v burst mode forced continuous mode load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 3371 g35 0 1 100 1000 10 v out = 1.8v v in = 3.3v f osc = 1mhz, l = 3.3h f osc = 2mhz, l = 2.2h f osc = 3mhz, l = 1h f osc = 1mhz, l = 3.3h f osc = 2mhz, l = 2.2h f osc = 3mhz, l = 1h forced continuous mode burst mode frequency (mhz) 1 1.8 2.8 1.4 2.42.2 3371 g36 3 1.6 2.6 1.2 2 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0 v in = 2.25v v in = 3.3v v in = 5.5v v out = 1.8v i load = 100ma l = 3.3h ltc 3371 3371fb
10 for more information www.linear.com/LTC3371 typical performance characteristics 4a buck regulator load regulation (forced continuous mode) 1a buck regulator line regulation (forced continuous mode) 1a buck regulator no- load startup transient ( burst mode operation) 1a buck regulator load regulation (forced continuous mode) 4a buck regulator no- load startup transient ( forced continuous mode) t a = 25c unless otherwise noted. frequency (mhz) 1 1.8 2.8 1.4 2.42.2 3371 g37 3 1.6 2.6 1.2 2 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0 v in = 3.3v v in = 2.25v v in = 5.5v v out = 1.8v i load = 200ma l = 3.3h frequency (mhz) 1 1.8 2.8 1.4 2.42.2 3371 g38 3 1.6 2.6 1.2 2 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0 v out = 1.8v v in = 3.3v l = 3.3h i load = 100ma i load = 500ma i load = 20ma 1a buck regulator no- load startup transient ( forced continuous mode) 4a buck regulator no- load startup transient ( burst mode operation) 1a buck efficiency vs frequency (forced continuous mode) 1a buck efficiency vs frequency (forced continuous mode) load current (ma) 1.792 power loss (mw) 1.816 1.82 1.788 1.784 1.812 1.8 1.808 1.804 1.796 3371 g39 1.78 1 100 1000 10 f osc = 2mhz l = 2.2h v in = 5.5v v in = 3.3v v in = 2.25v dropout load current (ma) 3371 g40 1.792 v out (v) 1.816 1.82 1.788 1.784 1.812 1.8 1.808 1.804 1.796 1.78 1 100 1000 10 v in = 5.5v v in = 3.3v v in = 2.25v dropout f osc = 2mhz l = 2.2h v in (v) 4.5 5 4 3371 g41 5.5 3 2.5 3.5 1.785 v out (v) 1.815 1.82 1.81 1.795 1.805 1.8 1.79 1.78 f osc = 2mhz l = 2.2h i load = 100ma i load = 500ma 200s/div v out 500mv/div inductor current 500ma/div en 2v/div 3371 g42 v in = 3.3v v out = 1.8v 200s/div v out 500mv/div inductor current 500ma/div en 2v/div 3371 g43 v in = 3.3v v out = 1.8v 200s/div v out 500mv/div inductor current 500ma/div en 2v/div 3371 g44 v in = 3.3v v out = 1.8v 200s/div v out 500mv/div inductor current 500ma/div en 2v/div 3371 g45 v in = 3.3v v out = 1.8v ltc 3371 3371fb
11 for more information www.linear.com/LTC3371 typical performance characteristics 1a buck regulator, transient response ( burst mode operation) 1a buck regulator, transient response ( forced continuous mode) 4a buck regulator, transient response ( burst mode operation) 4a buck regulator, transient response ( forced continuous mode) t a = 25c unless otherwise noted. 50s/div v out 100mv/div ac-coupled inductor current 200ma/div 0ma 3371 g46 load step = 100ma to 700ma v in = 3.3v v out = 1.8v 50s/div v out 100mv/div ac-coupled inductor current 200ma/div 0ma 3371 g47 load step = 100ma to 700ma v in = 3.3v v out = 1.8v 50s/div v out 100mv/div ac-coupled inductor current 1a/div 0ma 3371 g48 load step = 400ma to 2.8a v in = 3.3v v out = 1.8v 50s/div v out 100mv/div ac-coupled inductor current 1a/div 0ma 3371 g49 load step = 400ma to 2.8a v in = 3.3v v out = 1.8v ltc 3371 3371fb
12 for more information www.linear.com/LTC3371 pin functions (qfn/tssop) fb1 (pin 1/pin 5): buck regulator 1 feedback pin. receives feedback by a resistor divider connected across the output. v ina (pin 2/pin 6): power stage a input supply. bypass to gnd with a 10f or larger ceramic capacitor. swa (pin 3/pin 7): power stage a switch node. external inductor connects to this pin. swb (pin 4/pin 8): power stage b switch node. external inductor connects to this pin. v inb (pin 5/pin 9): power stage b input supply. bypass to gnd with a 10f or larger ceramic capacitor. v inc (pin 6/pin 10): power stage c input supply. bypass to gnd with a 10f or larger ceramic capacitor. swc (pin 7/pin 11): power stage c switch node. external inductor connects to this pin. swd (pin 8/pin 12): power stage d switch node. external inductor connects to this pin. v ind (pin 9/pin 13): power stage d input supply. bypass to gnd with a 10f or larger ceramic capacitor. fb 2 (pin 10/pin 14): buck regulator 2 feedback pin. receives feedback by a resistor divider connected across the output. in configurations where buck 2 is not used, fb2 should be tied to ground. en2 (pin 11/pin 15): buck regulator 2 enable input. active high . in configurations where buck 2 is not used, tie en2 to ground. do not float. rst2 ( pin 12/pin 16): buck regulator 2 reset pin (active low). open-drain output. when buck 2 is disabled or its regulated output voltage is more than 5% below its programmed level, this pin is driven low. assertion delay is scaled by the c t capacitor. c1 (pin 13/pin 17): configuration control input bit. with c2 and c3, c1 configures the buck output current power stage combinations. c1 should either be tied to v cc or ground. do not float. c2 (pin 14/pin 18): configuration control input bit. with c1 and c3, c2 configures the buck output current power stage combinations. c2 should either be tied to v cc or ground. do not float. c3 (pin 15/pin 19): configuration control input bit. with c1 and c2, c3 configures the buck output current power stage combinations. c3 should either be tied to v cc or ground. do not float. wdi (pin 16/pin 20): watchdog timer input. the wdi pin must be toggled either low to high or high to low every 1.62 seconds. failure to toggle wdi results in the wdo pin being pulled low for 202 ms. all times correspond to a 10nf capacitor on the ct pin. wdo ( pin 17/pin 21): watchdog timer output. open - drain output. wdo is pulled low for 202 ms during a watchdog timeout period. the wdo pin pulls low if the wdi input does not transition in less than 1.62 seconds since its last transition or 12.9 seconds after a watchdog timeout period. a v cc uvlo event resets the watchdog timer and wdo asserts itself low for the 202 ms watchdog timeout period. all times correspond to a 10nf capacitor on the ct pin. ct (pin 18/pin 22): timing capacitor pin. a capacitor connected to gnd sets a time constant which is scaled for use by the wdi, wdo, and rst1-4 pins. rst3 ( pin 19/pin 23): buck regulator 3 reset pin (active low ). open-drain output. when buck 3 is disabled or its regulated output voltage is more than 5% below its programmed level, this pin is driven low. assertion delay is scaled by the c t capacitor. en3 (pin 20/pin 24): buck regulator 3 enable input. active high . in configurations where buck 3 is not used, tie en3 to ground. do not float. fb 3 (pin 21/pin 25): buck regulator 3 feedback pin. receives feedback by a resistor divider connected across the output. in configurations where buck 3 is not used, fb 3 should be tied to ground. ltc 3371 3371fb
13 for more information www.linear.com/LTC3371 pin functions (qfn/tssop) v ine (pin 22/pin 26): power stage e input supply. bypass to gnd with a 10f or larger ceramic capacitor. swe ( pin 23/pin 27): power stage e switch node. external inductor connects to this pin. swf ( pin 24/pin 28): power stage f switch node. external inductor connects to this pin. v inf (pin 25/pin 29): power stage f input supply. bypass to gnd with a 10f or larger ceramic capacitor. v ing (pin 26/pin 30): power stage g input supply. bypass to gnd with a 10f or larger ceramic capacitor. swg ( pin 27/pin 31): power stage g switch node. external inductor connects to this pin. swh ( pin 28/pin 32): power stage h switch node. external inductor connects to this pin. v inh ( pin 29/ pin 33/): power stage h input supply. bypass to gnd with a 10f or larger ceramic capacitor. fb4 (pin 30/pin 34): buck regulator 4 feedback pin. receives feedback by a resistor divider connected across the output. en4 (pin 31/pin 35): buck regulator 4 enable input. active high. do not float. rst 4 ( pin 32/pin 36): buck regulator 4 reset pin (active low ). open-drain output. when buck 4 is disabled or its regulated output voltage is more than 5% below its programmed level, this pin is driven low. assertion delay is scaled by the c t capacitor. rt (pin 33/pin 37): oscillator frequency pin. this pin provides two modes of setting the switching frequency. connecting a resistor from rt to ground sets the switching frequency based on the resistor value. if rt is tied to v cc the internal 2mhz oscillator is used. do not float. pll/mode (pin 34/pin 38): oscillator synchronization and buck mode select pin. driving pll/mode with an external clock signal synchronizes all switches to the applied frequency, and the buck converters operate in forced continuous mode. the slope compensation is au - tomatically adapted to the external clock frequency. the absence of an external clock signal enables the frequency programmed by the rt pin. when not synchronizing to an external clock this input determines how the LTC3371 operates at light loads. pulling this pin to ground selects burst mode operation. tying this pin to v cc invokes forced continuous mode operation. do not float. v cc (pin 35/pin 1): internal bias supply. bypass to gnd with a 10f or larger ceramic capacitor. temp (pin 36/pin 2): temperature indication pin. temp outputs a voltage of 220mv ( typical) at 25 c. the temp voltage increases by 7mv/c ( typical) at higher tempera- tures giving an external indication of the LTC3371 internal die temperature. rst1 (pin 37/pin 3): buck regulator 1 reset pin (active low). open-drain output. when buck 1 is disabled or its regulated output voltage is more than 2% below its programmed level, this pin is driven low. assertion delay is scaled by the c t capacitor. en1 (pin 38/pin 4): buck regulator 1 enable input. active high. do not float. gnd ( exposed pad pin 39): ground. the exposed pad must be connected to a continuous printed circuit board ground plane directly under the LTC3371. ltc 3371 3371fb
14 for more information www.linear.com/LTC3371 block diagram (pin numbers reflect tssop package) 21 watchdog timer state machine buck regulator 1 control ct oscillator wdo 20 wdi 22 ct 3 delay bandgap uvlo sd rst1 16 delay rst logic 4 pgood ct clock rst2 23 delay rst3 36 delay v inb mode rst4 4 en1 5 fb1 oscillator 37 rt 1 v cc 38 pll/mode clk ref ot uv mode buck regulator 2 control v ind 15 fb2 14 en2 buck regulator 3 control v ine 24 fb3 25 en3 buck regulator 4 control 1a power stage h v ing c2 configuration lines 35 en4 34 fb4 sd ref clk 4 18 c1 17 c3 gnd (exposed pad) swh 3371 bd v inh 19 39 32 33 1a power stage g swg v ing 31 30 1a power stage f swf v inf 28 29 1a power stage e swe v ine 27 26 1a power stage d swd v ind 12 13 1a power stage c swc v inc 11 10 1a power stage b swb v inb 8 9 1a power stage a temp monitor swa v ina 7 6 temp 2 4 ltc 3371 3371fb
15 for more information www.linear.com/LTC3371 operation buck switching regulators the LTC3371 contains eight monolithic 1a synchronous buck switching channels. these are controlled by up to four current mode regulator controllers. all of the switch - ing regulators are internally compensated and need only external feedback resistors to set the output voltage. the switching regulators offer two operating modes: burst mode operation (pll/mode = low) for higher efficiency at light loads and forced continuous pwm mode (pll/ mode = high or switching) for lower noise at light loads. in burst mode operation at light loads, the output capacitor is charged to a voltage slightly higher than its regulation point. the regulator then goes into a sleep state, during which time the output capacitor provides the load current. in sleep most of the regulators circuitry is powered down, helping conserve input power. when the output capaci - tor droops below its programmed value, the circuitry is powered on and another burst cycle begins. the sleep time decreases as load current increases. in burst mode operation, the regulator bursts at light loads whereas at higher loads it operates at constant frequency pwm mode operation. in forced continuous mode, the oscillator runs continuously and the buck switch currents are allowed to reverse under very light load conditions to maintain regulation. this mode allows the buck to run at a fixed frequency with minimal output ripple. each buck switching regulator can operate at an indepen - dent v in voltage and has its own fb and en pin to maxi- mize flexibility . the enable pins have two different enable threshold voltages that depend on the operating state of the LTC3371. with all regulators disabled, the enable pin threshold is set to 730mv ( typical). once any regulator is enabled, the enable pin thresholds of the remaining regulators are set to a bandgap-based 400 mv and the en pins are each monitored by a precision comparator. this precision en threshold may be used to provide event- based sequencing via feedback from other previously enabled regulators. all buck regulators have forward and reverse-current limiting, soft-start to limit inrush current during start-up and short-circuit protection. the buck switching regulators are phased in 90 steps to reduce noise and input ripple. the phase step determines the fixed edge of the switching sequence, which is when the pmos turns on. the pmos off ( nmos on) phase is subject to the duty cycle demanded by the regulator . buck ?1 is set to 0, buck 2 is set to 90, buck 3 is set to 270, and buck 4 is set to180. in shutdown all sw nodes are high impedance. the buck regulator enable pins may be tied to v out voltages through a resistor divider, to program power-up sequencing. the buck switching regulators feature a controlled shut - down scheme where the inductor current ramps down to zero through the nmos switch. if any event causes the buck regulator to shut down (en = low, ot, v ina-h or v cc uvlo) the nmos switch turns on until the inductor current reaches 0ma ( typical). then, the switch pin becomes hi-z. buck regulators with combined power stages up to four adjacent buck regulators may be combined in a master-slave configuration by setting the configuration via the c1, c2, and c3 pins. these pins should either be tied to ground or pin strapped to v cc in accordance with the desired configuration code ( table 1). any combined sw pins must be tied together, as must any of the com - bined v in pins. en1 and fb1 are utilized by buck 1, en2 and fb2 by buck 2, en3 and fb3 by buck 3, and en4 and fb4 by buck 4. if any buck is not used or is not available in the desired configuration, then the associated fb and en pins must be tied to ground. any available combination of 2, 3, or 4 adjacent buck regulators serve to provide up to either 2a, 3 a, or 4a of average output load current. for example, code 110 (c3c2c1) configures buck 1 to operate as a 4 a regula - tor through v in /sw pairs a, b, c, and d, while buck 2 is disabled, buck 3 operates as a 1 a regulator through v in / sw pair?e, and buck 4 operates as a 3 a regulator through v in /sw pairs f, g, and h. ltc 3371 3371fb
16 for more information www.linear.com/LTC3371 operation table 1. master slave program combinations (each letter corresponds to a v in and sw pair) program code c3c2c1 buck 1 buck 2 buck 3 buck 4 000 ab cd ef gh 001 abc d ef gh 010 abc d e fgh 011 abch d e fg 100 abc de not used fgh 101 abcd not used ef gh 110 abcd not used e fgh 111 abcd not used not used efgh power failure reporting via rst pins power failure conditions are reported back by each bucks associated rst pin. each buck switching regulator has an internal power good ( pgood) signal. when the regulated output voltage of an enabled switcher falls below 98% for buck 1 or 95% for bucks 2-4 of its programmed value, the pgood signal is pulled low. if any pgood signal stays low for greater than 100 s, then the associated rst pin is pulled low, indicating to a microprocessor that a power failure fault has occurred. the 100 s filter time prevents the pin from being pulled low due to a transient. the pgood signal has a 0.3% hysteresis such that when the regulated output voltage of an enabled switcher rises above 98.3% or 95.3%, respectively, of its programmed value, the pgood signal transitions high. once an enabled regulator has its output pgood for 202ms (typical, c t = 10 nf) its associated rst output goes hi-z. any disabled or inactive switchers will assert a rst low. t emperature monitoring and overtemperature protection to prevent thermal damage to the LTC3371 and its sur - rounding components , the LTC3371 incorporates an overtemperature ( ot) function. when the LTC3371 die temperature reaches 170c ( typical) all enabled buck switching regulators are shut down and remain in shutdown until the die temperature falls to 160c (typical). the temperature may be read back by the user by sampling the temp pin analog voltage. the temperature, t , indicated by the temp pin voltage is given by: t = v temp C 45mv 7mv ?1 c (1) if none of the buck switching regulators are enabled, then the temperature monitor is also shut down to further reduce quiescent current. programming the operating frequency selection of the operating frequency is a trade-off between efficiency and component size. high frequency operation allows the use of smaller inductor and capacitor values. operation at lower frequencies improves efficiency by reducing internal gate charge losses but requires larger inductance values and/or capacitance to maintain low output voltage ripple. the operating frequency for all of the LTC3371 regulators is determined by an external resistor that is connected between the rt pin and ground. the operating frequency can be calculated using the following equation: f osc = 8 ?10 11 ? hz r t (2) while the LTC3371 is designed to function with operat - ing frequencies between 1 mhz and 3 mhz, it has safety clamps that will prevent the oscillator from running faster than 4mhz ( typical) or slower than 250khz ( typical). tying the rt pin to v cc sets the oscillator to the default internal operating frequency of 2mhz (typical). the LTC3371s internal oscillator can be synchronized through an internal pll circuit to an external frequency by applying a square wave clock signal to the pll/mode pin. during synchronization, the top mosfet turn-on of buck regulator 1 is phase locked to the rising edge of the external frequency source. all other buck switching regulators are locked to the appropriate phase of the external frequency sour ce ( see buck switching regulators). ltc 3371 3371fb
17 for more information www.linear.com/LTC3371 operation the synchronization frequency range is 1 mhz to 3mhz. a synchronization signal on the pll/mode pin will force all active buck switching regulators to operate in forced continuous mode pwm . windowed watchdog timer a standard watchdog function is used to ensure that the system is in a valid state by continuously monitoring the microprocessor s activity. the microprocessor must toggle the logic state of the wdi pin periodically in order to clear the watchdog timer. the wdi pin reset is read only on a wdi falling edge, such that a single reset signal may be asserted by pulsing the wdi pin for a time greater than the minimum pulse width. if timeout occurs, the LTC3371 asserts a wdo low for the reset timeout period, issuing a system reset. once the reset timeout completes, wdo is released to go high and the watchdog timer starts again. during power-up, the watchdog timer initiates in the timeout state with wdo asserted low. as soon as the reset timer times out, wdo goes high and the watchdog timer is started. the LTC3371 implements a windowed watchdog function by adding a lower boundary condition to the standard watchdog function. if the wdi input receives a falling edge prior to the watchdog lower boundary, the part considers this a watchdog failure, and asserts wdo low (releasing again after the reset timeout period as described above). this will again be followed by another lower boundary time period. choosing the c t capacitor the watchdog timeout period is adjustable and can be optimized for software execution. the watchdog timeout period is adjusted by connecting a capacitor between ct and ground. given a specified watchdog timeout period, the capacitor is determined by: c t = t wdo ? 49.39[nf/s] (3) for example, using a standard capacitor value of 10nf gives a 202ms watchdog timeout period. further, the other watchdog timing periods scale with t wdo . the watchdog lower boundary time (t wdl ) scales as precisely 1/4 of t wdo , the watchdog upper boundary time following the previous wdi pulse scales as eight times that of t wdo , and the watchdog upper boundary time following a watchdog timeout scales as 64 times that of t wdo . finally the rst assertion delay will scale to the same time as t wdo . these timing periods are illustrated in figure 1. each wdo low period is equal to the time period t 2 -t 1 (202 ms for a 10nf c t capacitor, typical). if a wdi falling edge occurs before the watchdog lower boundary, indicated by t 3 -t 2 (50.6ms for a 10 nf c t capacitor, typical), then another watchdog timeout period occurs. if a wdi falling edge occurs after the watchdog lower boundary (t 4 ), then the watchdog counter resets, beginning with another watch- dog lower boundary period. in the case where a wdi low transition is not detected by the specified time another watchdog timeout period is initiated. this time is indicated by t 5 -t 4 (1.62 s for a 10 nf c t capacitor, typical). if a wdi low transition is not detected within the specified time fol- lowing a watchdog timeout period, then another watchdog timeout period is initiated. this time is indicated by t 7 -t 6 (12.9s for a 10nf c t capacitor, typical). wdo wdi t 1 t 2 t 3 t 4 t 5 t 6 t 7 3371 f01 figure 1. wdo timing parameters ltc 3371 3371fb
18 for more information www.linear.com/LTC3371 ltc 3371 applications information buck switching regulator output voltage and feedback network the output voltage of the buck switching regulators is programmed by a resistor divider connected from the switching regulators output to its feedback pin and is given by v out = v fb (1 + r2/r1) as shown in figure 2. typical values for r1 range from 40 k to 1 m. the buck regulator transient response may improve with optional capacitor, c ff , that helps cancel the pole created by the feedback resistors and the input capacitance of the fb pin. experimentation with capacitor values between 2 pf and 22pf may improve transient response. figure 2. feedback components + buck switching regulator v out fb r1 3371 f02 r2 c ff optional c out buck regulators all four buck regulators are designed to be used with inductors ranging from 1 h to 3.3 h depending on the lowest switching frequency at which the buck regulator must operate. when operating at 1 mhz a 3.3 h inductor should be used, while at 3 mhz a 1 h inductor may be used, or a higher value inductor may be used if reduced current ripple is desired. table 2 shows some recom - mended inductors for the buck regulators. the bucks are compensated to operate across the range of possible v in and v out voltages when the appropriate inductance is used for the desired switching frequency. the input supply should be decoupled with a 10 f capacitor while the output should be decoupled with a 22 f capaci - tor. refer to the capacitor selection section for details on selecting a proper capacitor. combined buck power stages the LTC3371 has eight power stages that can handle aver - age load currents of 1 a each. these power stages may be combined in any one of eight possible combinations, via the c1, c2, and c3 pins ( see table 1). tables 3, 4, and 5 show recommended inductors for the combined power stage configurations. the input supply should be decoupled with a 22 f capacitor while the output should be decoupled with a 47 f capaci- tor for a 2 a combined buck regulator. likewise for 3 a and 4a configurations the input and output capacitance must be scaled up to account for the increased load. refer to the capacitor selection section for details on selecting a proper capacitor. in some cases it may be beneficial to use more power stages than needed to achieve increased efficiency of the active regulators. in general the efficiency will improve by adding stages for any regulator running close to what the rated load current would be without the additional stage. for example, if the application requires a 1 a regulator that supplies close to 1 a at a high duty cycle, a 3 a regulator that only peaks at 3 a but averages a lower current, and a 2 a regulator that runs at 1.5 a at a high duty cycle, bet - ter efficiency may be achieved by using the 3a, 3a, 2a configuration. input and output decoupling capacitor selection the LTC3371 has individual input supply pins for each buck power stage and a separate v cc pin that supplies power to all top level control and logic. each of these pins must be decoupled with low esr capacitors to gnd . these capacitors must be placed as close to the pins as possible. ceramic dielectric capacitors are a good compro - mise between high dielectric constant and stability versus temperature and dc bias. note that the capacitance of a capacitor deteriorates at higher dc bias. it is important to consult manufacturer data sheets and obtain the true capacitance of a capacitor at the dc bias voltage that it will be operated at. for this reason, avoid the use of y5v dielectric capacitors. the x5r/x7r dielectric capacitors offer good overall performance. the input supply voltage pins 35/1, 2/6, 5/9, 6/10, 9/13, 22/26, 25/29, 26/30, and 29/33 ( qfn/tssop packages) all need to be decoupled with at least 10 f capacitors. if power stages are combined the supplies should be shorted with as short of a trace as possible, and the decoupling capacitor should be scaled accordingly. 3371fb
19 for more information www.linear.com/LTC3371 applications information table 2. recommended inductors for 1a buck regulators part number l (h) max i dc (a) max dcr (m) size in mm (l w h) manufacturer ihlp1212aber1r0m-11 1.0 3 38 3 3.6 1.2 vishay 1239as-h-1r0n 1 2.5 65 2.5 2.0 1.2 toko xfl4020-222me 2.2 3.5 23.5 4 4 2.1 coilcraft 1277as-h-2r2n 2.2 2.6 84 3.2 2.5 1.2 toko ihlp1212bzer2r2m-11 2.2 3 46 3 3.6 1.2 vishay xfl4020-332me 3.3 2.8 38.3 4 4 2.1 coilcraft ihlp1212bzer3r3m-11 3.3 2.7 61 3 3.6 1.2 vishay table 3. recommended inductors for 2a buck regulators part number l (h) max i dc (a) max dcr (m) size in mm (l w h) manufacturer xfl4020-102me 1.0 5.1 11.9 4 4 2.1 coilcraft 74437324010 1 5 27 4.45 4.06 1.8 wurth elektronik xal4020-222me 2.2 5.6 38.7 4 4 2.1 coilcraft fdv0530-2r2m 2.2 5.3 15.5 6.2 5.8 3 toko ihlp2020bzer2r2m-11 2.2 5 37.7 5.49 5.18 2 vishay xal4030-332me 3.3 5.5 28.6 4 4 3.1 coilcraft fdv0530-3r3m 3.3 4.1 34.1 6.2 5.8 3 toko table 4. recommended inductors for 3a buck regulators part number l (h) max i dc (a) max dcr (m) size in mm (l w h) manufacturer xal4020-102me 1.0 8.7 14.6 4 4 2.1 coilcraft fdv0530-1r0m 1 8.4 11.2 6.2 5.8 3 toko xal5030-222me 2.2 9.2 14.5 5.28 5.48 3.1 coilcraft ihlp2525czer2r2m-01 2.2 8 20 6.86 6.47 3 vishay 74437346022 2.2 6.5 20 7.3 6.6 2.8 wurth elektonik xal5030-332me 3.3 8.7 23.3 5.28 5.48 3.1 coilcraft spm6530t-3r3m 3.3 7.3 27 7.1 6.5 3 tdk table 5. recommended inductors for 4a buck regulators part number l (h) max i dc (a) max dcr (m) size in mm (l w h) manufacturer xal5030-122me 1.2 12.5 9.4 5.28 5.48 3.1 coilcraft spm6530t-1r0m120 1 14.1 7.81 7.1 6.5 3 tdk xal5030-222me 2.2 9.2 14.5 5.28 5.48 3.1 coilcraft spm6530t-2r2m 2.2 8.4 19 7.1 6.5 3 tdk ihlp2525ezer2r 2m-01 2.2 13.6 20.9 6.86 6.47 5 vishay xal6030-332me 3.3 8 20.81 6.36 6.56 3.1 coilcraft fdve1040-3r3m 3.3 9.8 10.1 11.2 10 4 toko ltc 3371 3371fb
20 for more information www.linear.com/LTC3371 applications information pcb considerations when laying out the printed circuit board, the following list should be followed to ensure proper operation of the LTC3371: 1. the exposed pad of the package ( pin 39) should connect directly to a large ground plane to minimize thermal and electrical impedance. 2. each of the input supply pins should have a decoupling capacitor. 3. the connections to the switching regulator input supply pins and their respective decoupling capacitors should be kept as short as possible. the gnd side of these capacitors should connect directly to the ground plane of the part. these capacitors provide the ac current to the internal power mosfets and their drivers. it is important to minimize inductance from these capacitors to the v in pins of the LTC3371. 4. the switching power traces connecting swa , swb , swc, swd, swe, swf, swg, and swh to the inductors should be minimized to reduce radiated emi and parasitic coupling. due to the large voltage swing of the switching nodes, high input impedance sensitive nodes, such as the feedback nodes, should be kept far away or shielded from the switching nodes or poor performance could result. 5. the gnd side of the switching regulator output capaci - tors should connect directly to the thermal ground plane of the part. minimize the trace length from the output capacitor to the inductor(s)/pin(s). 6. in a multiple power stage buck regulator application the trace length of switch nodes to the inductor must be kept equal to ensure proper operation. 7. care should be taken to minimize capacitance on the temp pin. if the temp voltage must drive more than ~30pf, then the pin should be isolated with a resistor placed close to the pin of a value between 10 k and 100k. keep in mind that any load on the isolation resistor will create a proportional error. typical applications LTC3371 exposed pad 2.2h v ina v inb swa swb fb1 v ing v inh swg swh fb4 v inc v ind swc swd fb2 v ine v inf swe swf fb3 3371 ta02 2.2h 806k 649k 232k 464k 22f 2.25v to 5.5v 1.8v 2a 1.2v 2a 47f 47f 22f 2.25v to 5.5v 402k rt en1 en2 en3 en4 pll/mode c1 c2 c3 v cc rst1 rst2 rst3 rst4 wdo wdi temp ct microprocessor control 2.7v to 5.5v microprocessor control 10f 2.2h 2.2h 511k 162k 1m 665k 309k 22f 2.5v to 5.5v 3.3v 2a 2.5v 2a 47f 47f 22f 3.3v to 5.5v 4 2a quad buck application ltc 3371 3371fb
21 for more information www.linear.com/LTC3371 typical applications exposed pad 2.2h v inh v ina v inb v inc swh swa swb swc fb1 v inf v ing swf swg fb4 3371 ta03 2.2h 806k 649k 232k 1m 464k 47f 1.2v 4a 2.5v 1a 1.8v 2a 10f 10f 22f 22f 3.3v 1a 47f 22f 100f 2.2h LTC3371 v ind swd fb2 v ine swe fb3 2.2h 511k 162k 1m 665k 309k 402k rt en1 en2 en3 en4 pll/mode c1 c2 c3 v cc rst1 rst2 rst3 rst4 wdo wdi temp ct v cc microprocessor control 10f 0.1f c in 22f v in 5.5v to 36v intv cc 34.8k 470pf 100k 100k c out : sanyo 10tpe330m d1: dfls1100 l1 coilcraft ser1360-802kl mtop, mbot: si7850dp 19.1k 2.2f d1 0.1f freq ith sgnd sgnd ltc3891 v in pgood pllin/mode i lim intv cc pgnd l1 8h r sense 7m boost sw bg sense + sense ? extv cc v fb tg mtop mbot 1nf c out 330f 5v 6a track/ss run v in en kill int pb tmr gnd on ltc2955ts8-1 microprocessor control microprocessor control buck regulators with sequenced start-up diven from a high voltage upstream buck converter ltc 3371 3371fb
22 for more information www.linear.com/LTC3371 typical applications LTC3371 exposed pad 2.2h v ina swa swb swc swd fb1 v inh swh swg swf fb4 3371 ta04 2.2h 511k 511k 324k 649k 1.6v 3a 1.2v 4a 2.7v to 5.5v 100f 68f 10f 10f 10f 10f 10f 10f 10f 10f v inb v ing v inc v inf 2.2h v ind rt ct fb2 en2 c1 c2 c3 en1 en3 en4 pll/mode v ine swe fb3 rst1 rst3 rst4 wdo wdi temp rst2 v cc microprocessor control 665k 309k 1m 1m 2.5v 1a 22f 10f microprocessor control no connect combined buck regulators with common input supply ltc 3371 3371fb
23 for more information www.linear.com/LTC3371 package description please refer to http://www .linear.com/product/LTC3371#packaging for the most recent package drawings. 4.75 (.187) ref fe38 (aa) tssop rev c 0910 0.09 ? 0.20 (.0035 ? .0079) 0 ? 8 0.25 ref 0.50 ? 0.75 (.020 ? .030) 4.30 ? 4.50* (.169 ? .177) 1 19 20 ref 9.60 ? 9.80* (.378 ? .386) 38 1.20 (.047) max 0.05 ? 0.15 (.002 ? .006) 0.50 (.0196) bsc 0.17 ? 0.27 (.0067 ? .0106) typ recommended solder pad layout 0.315 0.05 0.50 bsc 4.50 ref 6.60 0.10 1.05 0.10 4.75 ref 2.74 ref 2.74 (.108) millimeters (inches) *dimensions do not include mold flash. mold flash shall not exceed 0.150mm (.006") per side note: 1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale see note 4 4. recommended minimum pcb metal size for exposed pad attachment 6.40 (.252) bsc fe package 38-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1772 rev c) exposed pad variation aa ltc 3371 3371fb
24 for more information www.linear.com/LTC3371 package description please refer to http://www .linear.com/product/LTC3371#packaging for the most recent package drawings. 5.00 0.10 note: 1. drawing conforms to jedec package outline m0-220 variation whkd 2. drawing not to scale 3. all dimensions are in millimeters pin 1 top mark (see note 6) 37 1 2 38 bottom view?exposed pad 5.50 ref 5.15 0.10 7.00 0.10 0.75 0.05 r = 0.125 typ r = 0.10 typ 0.25 0.05 (uh) qfn ref c 1107 0.50 bsc 0.200 ref 0.00 ? 0.05 recommended solder pad layout apply solder mask to areas that are not soldered 3.00 ref 3.15 0.10 0.40 0.10 0.70 0.05 0.50 bsc 5.5 ref 3.00 ref 3.15 0.05 4.10 0.05 5.50 0.05 5.15 0.05 6.10 0.05 7.50 0.05 0.25 0.05 package outline 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.20mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 notch r = 0.30 typ or 0.35 45 chamfer uhf package 38-lead plastic qfn (5mm 7mm) (reference ltc dwg # 05-08-1701 rev c) ltc 3371 3371fb
25 for more information www.linear.com/LTC3371 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 05/15 modified buck efficiency graphs legends changed recommended inductor value, table 3 modified typical application circuits 1, 6 19 21, 22, 23, 26 b 06/16 add qfn (uhf code) package drawing 24 ltc 3371 3371fb
26 for more information www.linear.com/LTC3371 ? linear technology corporation 2014 lt 0616 rev b ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/LTC3371 related parts typical application LTC3371 exposed pad 1h swa swb swc fb1 v inc v inb v ina v ing v inh swh swg fb4 3371 ta05 1h 649k 432k 324k 649k 2v 2a 2.25v to 5.5v 2.5v to 5.5v 1.2v 3a 2.25v to 5.5v 68f 10f 10f 10f 10f 10f 47f 1h c1 c2 c3 temp pll/mode en1 en2 en3 en4 swe swf fb3 swd v ind v ine v inf fb2 511k 162k rst1 rst2 rst3 rst4 wdo wdi ct rt v cc v cc microprocessor control 1h 665k 309k 1m 2.7v to 5.5v 47f 10f 10f 22f 10f 10f 2.5v 2a 3.3v 1a 3.3v to 5.5v 267k microprocessor control combined bucks with 3mhz switching frequency and sequenced power up part number description comments ltc3589 8-output regulator with sequencing and i 2 c triple i 2 c adjustable high efficiency step-down dc/dc converters: 1.6a, 1a, 1a. high efficiency 1.2a buck-boost dc/dc converter, triple 250ma ldo regulators. pushbutton on/off control with system reset, flexible pin-strap sequencing operation. i 2 c and independent enable control pins, dynamic voltage scaling and slew rate control. selectable 2.25mhz or 1.12mhz switching frequency, 8a standby current, 40-lead (6mm 6mm 0.75mm) qfn package. ltc3675 7-channel configurable high power pmic quad synchronous buck regulators (1a, 1a, 500ma, 500ma). buck dc/dcs can be paralleled to deliver up to 2 current with a single inductor. 1a boost, 1a buck-boost, 40v led driver. 44-lead (4mm 7mm 0.75mm) qfn package. ltc3676 8-channel power management solution for application processors quad synchronous buck regulators (2.5a , 2.5a , 1.5a , 1.5a ). quad ldo regulators (300ma, 300ma, 300ma, 25 ma). pushbutton on / off control with system reset. ddr solution with vtt and vttr reference. 40-lead (6mm 6 mm 0.75 mm) qfn package. ltc3375 8-channel programmable configurable 1a dc/dc 8 1a synchronous buck regulators. can connect up to four power stages in parallel to make a single inductor, high current output (4a maximum), 15 output configurations possible, 48-lead (7 mm 7mm 0.75mm) qfn package. ltc3374 8-channel programmable configurable 1a dc/dc 8 1a synchronous buck regulators. can connect up to four power stages in parallel to make a single inductor, high current output (4a maximum), 15 output configurations possible, 38-lead (5mm 7mm 0.75mm) qfn and tssop packages. ltc3370 4-channel configurable dc/dc with 8 1a power stages 4 synchronous buck regulators with 8 1a power stages. can connect up to four power stages in parallel to make a single inductor, high current output (4a maximum), 8 output configurations possible, precision pgoodall indication, 32-lead (5mm 5mm 0.75mm) qfn package. ltc 3371 3371fb


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